Electronic devices frequently require more than a single voltage source and to this end are powered either by multiple power supplies or by a single power supply having multiple voltage outputs. In either case, synchronization between the actual initiation of multiple voltage sources applied indiscriminately to the same device can be critical and failure to synchronize can cause malfunction of the device or even damage thereto.
An example of the damage which can ensue is provided in the Texas Instruments TGC4000/TEC4000 design manual (1996) with regard to an Application Specific Integrated Circuit (ASIC) having voltage inputs of 5 volts and 3.3 volts. It is explained on page 2-39 that if the 3.3V supplied is turned on before the 5V supply, TGC4000/TEC4000 5V-tolerant buffers in a is logic 1 state can supply large amounts of current through their clamp diodes to the 5V supply pin. This can lead to excessive power dissipation in the TGC4000/TEC4000 device and a violation of current density limits. However, if the 5V supply is turned on before the 3.3V supply, the maximum drain-to-gate voltage of the n-channel transistors in the 5V-tolerant buffers exceeds the recommended value, and the effects of channel hot carriers can be accelerated.
This problem has been addressed in the art principally in two ways. Thus, according to one approach, also explained in the above-cited reference, mixed voltages are usually ramped. Thus, in a typical scenario, the 3.3V supply is ramped to full voltage first. During this operation, all the system components which are tolerant to a 5V supply are forced into a high-impedance state so as to be effectively voltage-insensitive. Once the 3.3V supply has reached its peak voltage, the 5V supply is then ramped up. For power-down sequencing, the 5V-tolerant system components are forced in the high-impedance state, whereupon the 5V supply is then shutdown, followed by the 3V supply. The additional components add to the cost of the power supply and use precious PCB real estate.
Alternatively, a switched power supply may be used, which can turn on power after a predetermined time. Such an approach is described in U.S. Pat. No. 5,309,348 (Leu) and is also expensive because of the cost overhead imposed by the switchable power supply.
There is therefore a need for a more compact arrangement using readily available circuit components, for allowing proper synchronization between multiple power supplies, whilst imposing minimum overhead cost and space overheads.